A common application of a voltage controlled oscillator is in a phase locked loop. A phase locked loop comprises a phase comparator which compares the phase between a periodic incoming signal and a feedback signal. The phase comparator generates an error signal dependent on the phase difference. The error signal is passed through a filter to form a control signal for a voltage controlled oscillator which generates an output signal oscillating at a frequency dependent on the voltage of the control signal supplied from the filter to the voltage controlled oscillator.
Such loops are well known and have many applications, one of which is to increase on a chip the frequency of an external clock signal supplied to the chip. In such a case the output signal from the voltage controlled oscillator is fed back through a divide-by-n circuit to form the feedback signal for the phase comparator. The external clock signal is used as the incoming signal and the output signal from the voltage controlled oscillator (before it is fed back through the divide-by-n circuit) thus forms a periodic signal which oscillates at a selected multiple of the frequency of the incoming signal and at a fixed phase relative thereto.
Phase locked loops have been used to perform this function for some years now. However, problems have arisen when these loops are implemented on a chip with other circuitry. On chip circuitry, particularly logic circuitry, generates noise which can have a significant effect on the power supply which is required for operation of the phase locked loop. It is desirable that the phase locked loop be immune to such noise. Moreover, the stability of the loop is a function of its open loop gain which varies considerably with process and temperature conditions. It is difficult therefore to design a phase locked loop to have a particular open loop gain which will remain constant under different conditions.
An important component of a phase locked loop is the voltage controlled oscillator, and with existing designs this is also the most sensitive to noise affecting its power supply. A commonly used voltage controlled oscillator is based on a principle of operation in which a current source within the voltage controlled oscillator is controlled by the control signal for the voltage controlled oscillator to generate a current in dependence on the voltage of the control signal. The value of this current affects the rate at which a capacitor of the voltage controlled oscillator charges or discharges. On a graph of voltage against time, a ramp of a gradient depending on the current is thus generated. At the point at which this crosses a predetermined threshold, a voltage transition is generated which forms an edge of the output signal. The frequency of the output signal is related to the gradient of the ramp. If the output signal of the voltage controlled oscillator is to produce edges at fixed intervals it is important that the voltage ramp always crosses the threshold with a fixed delay from initiation of the ramp. Noise from the power supply can affect the shape of the ramp by introducing spikes or glitches so that there is no longer certainty over the time at which the ramp will cross the threshold. In these circumstances, the output signal is said to suffer from "jitter". A clock signal with jitter is unacceptable for many timing applications.
To overcome this, with some voltage controlled oscillators, a resistor is placed in one of the power supply lines to form, with capacitance between the positive and ground supply lines, a filter for filtering noise from the power supply. In this way, the voltage controlled oscillator is decoupled from the power supply. This has a disadvantage in that voltage is dropped across the resistor which reduces the supply available to the phase locked loop. As the speed requirement for the phase locked loop increases, so more current will be consumed and with this the voltage drop across the resistor will be increased, perhaps to such an extent that there will be insufficient supply to operate the phase locked loop.
It is an object of the present invention to provide a voltage controlled oscillator which is less sensitive to power supply noise. This means that the resistor included in the supply line of the power supply can be reduced in value or removed altogether. This would have the desirable result that less or no voltage would be dropped across the resistor, thus allowing the voltage controlled oscillator to consume more current and hence function at higher frequencies.